Unit 1.1.1 Structure and Function of the Processor

19 cards·by gurundus

Name three crucial details about registers.

only one item of data can be stored, they are specialized high-speed storage areas and data must be represented within them before use

Give five examples of registers.

Program Counter, Memory Address Register, Memory Data Register, Current Instruction Register and Accumulator

Give the three types of buses.

data bus, address bus and control bus

what types of pathways can buses be.

Simplex and Half-Duplex

what are the three main stages within the FDE cycle?

Fetch, Decode and Execute

What are the first stages of the Fetch process?

Address in PC is copied to MAR, the PC is incremented, a fetch signal is sent by the control bus from the CU to the memory

What are the intermediate stages of the Fetch process?

A fetch signal is sent by the control bus from the CU to the memory and the address in the MAR issent to the memory by the address bus

What are the final stages of the Fetch process?

The value stored in the memory returns by the data bus and is held in the MDR, the value in the MDRis copied to the CIR.

What are the stages within the Decode process?

The contents of the CIR are sent to the CU for decoding and then the data at the memory location of the address is retreived

What type of addressing can an instruction use?

they can use a direct address or an indexed address

What are the stages of the Execute process?

If the instruction is a jump function load the address from the CIR to the program counter, otherwise perform the instruction.

What are the factors affecting CPU performance?

Clock Speed, Cache memory, Number of cores, and Pipelining

What are the types of processor architecture?

Von neumann, Harvard and Contemporary Architecture.

What are the benefits of having cache memory?

It is faster to access than RAM and data that is commonly used can be stored there, there by decreasing the fetch time.

Why are Cache quicker to access than RAM?

The cache are closer to the registers than the RAM and they operate at similar speed to the CPU so there is very little lag.

Why are there 3 levels of cache?

If it were all level 1 cache it would cost more as fast memory is more exspensive

What is the advantage of having a multicore processor?

Different cores can run different applications at the same time, allowing more actions to occur each second

What is a potential disadvantage of having multiple cores?

If a core is processing an instruction that is dependent on the output of another instruction, from another core, the core has to wait.

When is pipelining most affective?

When code is being processed in which one instruction is not dependent on the instruction before it